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this is information on a product in full production. january 2013 doc id 023951 rev 1 1/51 51 LED5000 3 a monolithic step-down current source with dimming capability datasheet ? production data features 5.5 v to 48 v operating input voltage range 850 khz fixed switching frequency 200 mv typ. current sense voltage drop buck / buck-boost / floating boost topologies pwm dimming 3% output current accuracy over temperature 200 mw typical rds on peak current mode architecture short-circuit protection compliant with ceramic output capacitors inhibit for zero current consumption thermal shutdown applications high brightness led driving street lighting signage halogen bulb replacement general lighting description the LED5000 is an 850 khz fixed switching frequency monolithic step-down dc-dc converter designed to operate as a precise constant current source with an adjustable current capability up to 3 a dc. the embedded pwm dimming circuitry features led brightness control. the regulated output current level is set by connecting a sensing resistor to the feedback pin. the 200 mv typical r sense voltage drop enhances performance in terms of efficiency. the size of the overall application is minimized thanks to the high switching frequency and its compatibility with ceramic output capacitors. the device is fully protected against overheating, overcurrent and output short-circuit. the LED5000 is available in an hsop8 package. figure 1. typical application circuit hpso8 cin cflt vin gnd 1 2 dim rs cout u1 LED5000 boot 1 dim 2 inh 3 comp 4 gnd 6 sw 8 vin 7 fb 5 l am1 3 4 8 5v1 www.st.com
contents LED5000 2/51 doc id 023951 rev 1 contents 1 pin settings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.1 pin connection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 1.2 pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 2 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.1 maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.2 thermal data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 2.3 esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 3 electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 4 functional description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 4.1 power supply and voltage reference . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.2 voltage monitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.3 soft-start . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 4.4 dimming block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.5 inhibit block . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.6 error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 4.7 thermal shutdown . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 5 application notes - buck conversion . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.1 closing the loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.2 g co (s) control to output transfer function . . . . . . . . . . . . . . . . . . . . . . . . . 13 5.3 error amplifier compensation network . . . . . . . . . . . . . . . . . . . . . . . . . . . 14 5.4 led small signal model . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 5.5 total loop gain . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.6 compensation network design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 5.7 example of system design . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 18 5.8 dimming operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 5.8.1 dimming frequency vs. dimming depth . . . . . . . . . . . . . . . . . . . . . . . . . 22 5.9 component selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.9.1 sensing resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23
LED5000 contents doc id 023951 rev 1 3/51 5.9.2 inductor and output capacitor selection . . . . . . . . . . . . . . . . . . . . . . . . . 23 5.9.3 input capacitor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 5.10 layout considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 5.11 thermal considerations . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 5.12 short-circuit protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 29 5.13 application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 6 application notes - alternative topologies . . . . . . . . . . . . . . . . . . . . . . 34 6.1 inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 6.2 positive buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 6.3 floating boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 6.4 compensation network design for alternative topologies . . . . . . . . . . . . . 44 6.4.1 fp < bw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 6.4.2 fp > bw . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 46 7 package mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 8 ordering information . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 9 revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
list of tables LED5000 4/51 doc id 023951 rev 1 list of tables table 1. pin description . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 table 2. absolute maximum ratings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 3. thermal data. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 4. esd protection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 7 table 5. electrical characteristics . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 8 table 6. uncompensated error amplifier characteristics. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 12 table 7. inductor selection . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 25 table 8. list of ceramic capacitors for the LED5000 . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 26 table 9. component list . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 32 table 10. bb and boost parameters . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 45 table 11. hsop8 mechanical data . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 47 table 12. order code . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 49 table 13. document revision history . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 50
LED5000 list of figures doc id 023951 rev 1 5/51 list of figures figure 1. typical application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 1 figure 2. pin connection (top view) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 6 figure 3. LED5000 block diagram . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 10 figure 4. internal circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 5. soft-start open . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 11 figure 6. block diagram of the loop . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 13 figure 7. transconductance embedded error amplifier . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 15 figure 8. equivalent series resistor . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 16 figure 9. load equivalent circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 17 figure 10. module plot . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 11. phase plot. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 19 figure 12. dimming operation example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 20 figure 13. led rising edge operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 14. led rising edge operation (zoom) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 21 figure 15. dimming signal . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 22 figure 16. equivalent circuit. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 23 figure 17. layout example . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 27 figure 18. switching losses . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 28 figure 19. constant current protection triggering hiccup mode . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 20. evaluation board application circuit . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 31 figure 21. pcb layout (component side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 22. pcb layout (bottom side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 33 figure 23. inverting buck-boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 34 figure 24. led current source based on inverting bb topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 25. inverting bb dimming operation . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 36 figure 26. inverting bb pcb layout (component side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 27. inverting bb pcb layout (bottom side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 37 figure 28. positive buck-boost. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 38 figure 29. led current source based on positive bb+ topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 39 figure 30. floating boost . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 40 figure 31. led current source based on floating boost topology . . . . . . . . . . . . . . . . . . . . . . . . . . . . 42 figure 32. floating bb dimming operation. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 figure 33. floating boost pcb layout (component side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 43 figure 34. floating boost pcb layout (bottom side) . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 4 3 figure 35. package dimensions. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 48
pin settings LED5000 6/51 doc id 023951 rev 1 1 pin settings 1.1 pin connection figure 2. pin connection (top view) 1.2 pin description hsop8 am1 3 4 8 6v1 table 1. pin description type description 1 boot analog circuitry power supply connection 2dim dimming control input. logic low prevents the switching activity, logic high enables it. a square wave on this pin implements leds current pwm dimming. connect to vin if not used (see chapter 5.8 ) 3 inh inhibit pin. connect to gnd if not used. 4 comp analog circuitry 5fb feedback input. connect a proper sensing resistor to set the led current 6 gnd ground connection 7 vin power input voltage 8 sw switching node -e.p. exposed pad to be connected to gnd to increase the package thermal performance and the device noise immunity
LED5000 maximum ratings doc id 023951 rev 1 7/51 2 maximum ratings 2.1 maximum ratings 2.2 thermal data 2.3 e s d protection table 2. absolute maximum ratings s ymbol parameter value unit v in power supply input voltage -0.3 to 52 v v inh inhibit input -0.3 to 7 v v dim dimming input -0.3 to (v in +0.3) v v comp comp output -0.3 to 3 v boot bootstrap pin -0.3 to 55 v sw switching node -1 to (v in +0.3) v v fb feedback voltage -0.3 to 3 v t j operating junction temperature range -40 to 150 c t stg storage temperature range -65 to 150 c t lead lead temperature (soldering 10 sec.) 260 c table 3. thermal data s ymbol parameter value unit r th ja thermal resistance junction-ambient 40 c/w table 4. e s d protection s ymbol test condition value unit esd hbm 4 kv mm 500 v
electrical characteristics LED5000 8/51 doc id 023951 rev 1 3 electrical characteristics all tests performed at t j = 25 c, v cc = 12 v, v inh =0 v unless otherwise specified. the specification is guaranteed from (-40 to +125) t j temperature range by design, characterization and statistical correlation. table 5. electrical characteristics s ymbol parameter test condition min typ max unit v in operating input voltage range 5.5 48 v r ds(on) mosfet on resistance i sw =1 a 0.2 0.4 i sw maximum limiting current 3.7 4.5 5.2 a t hiccup hiccup time 16 ms f sw switching frequency 600 850 1000 khz duty cycle (1) 90 % t on min minimum conduction time of the power element (1) 90 ns t off min minimum conduction time of the external diode (1) 75 90 120 ns dc characteristics v fb voltage feedback 194 200 206 mv i fb fb biasing current 50 na i q quiescent current v dim >1.5 v 1.3 2 ma v dim >1.5 v, v in =48 v 1.7 2.4 ma i qst-by standby quiescent current v inh >1.5 v 12 16 34 a inhibit v inh inhibit levels device on v in =5.5 v to 48 v 0.5 v device off v in =5.5 v to 48 v 1.5 v i inh inhibit biasing current v inh =5 v 0.7 1.6 2.5 a
LED5000 electrical characteristics doc id 023951 rev 1 9/51 dimming v dim dimming levels switching activity v in =5.5 v to 48 v 2.2 v switching activity prevented v in =5.5 v to 48 v 0.5 v error amplifier v oh high level output voltage v fb = 0 v 3 v v ol low level output voltage v fb = 400 mv 150 mv i o source source output current v comp = 1.5 v; v fb = 0 v 16 23 30 a i o sink sink output current v comp = 1.5 v; v fb = 0.4 v 16 23 30 a i b source bias current v fb = 250 mv 50 na dc open loop gain r l = (1) 90 db gm transconductance i comp = tbd; v comp = tbd 220 s thermal shutdown t shdwn thermal shutdown temperature (1) 140 150 160 c t hys thermal shutdown hysteresis (1) 15 c 1. parameter guaranteed by design table 5. electrical characteristics (continued) s ymbol parameter test condition min typ max unit
functional description LED5000 10/51 doc id 023951 rev 1 4 functional description the LED5000 is based on a ?peak current mode? architecture with fixed frequency control. as a consequence the intersection between the error amplifier output and the sensed inductor current generates the control signal to drive the power switch. the main internal blocks shown in the block diagram in figure 3 are: a fully integrated sawtooth oscillator with a typical frequency of 850 khz a transconductance error amplifier an high side current sense amplifier to track the inductor current a pulse width modulator (pwm) comparator and the circuitry necessary to drive the internal power element the soft-start circuitry to decrease the inrush current at power-up the dimming block to implement pwm dimming the inhibit block for standby operation the current limitation circuit based on the pulse-by-pulse current and the hiccup protection the bootstrap circuitry to drive the embedded n-mos switch a circuit to implement the thermal protection function figure 3. LED5000 block diagram vin osc e/a driver driver dmd mosfet control logic regulator dimming i_ sense comp comp ocp ref 0. 1v softstart vsum vc ocp uvlo vdrv_p vdrv_n i2 v r sense sw gnd dim fb comp inh inh am1 3 4 8 7v1
LED5000 functional description doc id 023951 rev 1 11/51 4.1 power supply and voltage reference the internal regulator circuit consists of a startup circuit, an internal voltage pre-regulator, the bandgap voltage reference and the bias block that provides current to all the blocks. the starter supplies the startup current to the entire device when the input voltage goes high and the device is enabled (inhibit pin connected to ground). the pre-regulator block supplies the bandgap cell with a pre-regulated voltage that has a very low supply voltage noise sensitivity. 4.2 voltage monitor an internal block continuously senses the v cc , v ref and v bg . if the monitored voltages are good, the regulator begins operating. there is also a hysteresis on the v cc (uvlo). figure 4. internal circuit 4.3 s oft-start the startup phase is implemented ramping the reference of the embedded error amplifier in 1 msec typ. time. it minimizes the inrush current and decreases the stress of the power components at power up. figure 5. s oft-start open am1 3 4 88 v1 am1 3 4 8 9v1
functional description LED5000 12/51 doc id 023951 rev 1 during normal operation a new soft-start cycle takes place in case of: thermal shutdown event uvlo event the soft-start is disabled during the dimming operation to maximize the dimming performance. 4.4 dimming block the dim input features the led brightness control with the pwm dimming operation (see chapter 5.8 ). 4.5 inhibit block the inhibit block features the standby mode accordingly with table 5: electrical characteristics . the inh pin high level disables the device so the power consumption is reduced to less than 40 a. the inh pin is 5 v tolerant. 4.6 error amplifier the voltage error amplifier is the core of the loop regulation. it is a transconductance operational amplifier whose non inverting input is connected to the internal voltage reference (200 mv), while the inverting input (fb) is connected to the output current sensing resistor. the error amplifier output is compared with the inductor current sense information to perform pwm control. 4.7 thermal shutdown the shutdown block generates a signal that disables the power stage if the temperature of the chip goes higher than a fixed internal threshold (15010 c typical). the sensing element of the chip is close to the pdmos area, ensuring fast and accurate temperature detection. a 15 c typical hysteresis prevents the device from turning on and off continuously during the protection operation. table 6. uncompensated error amplifier characteristics description values transconductance 2200 s low frequency gain 90 db
LED5000 application notes - buck conversion doc id 023951 rev 1 13/51 5 application notes - buck conversion 5.1 closing the loop figure 6. block diagram of the loop 5.2 g co (s) control to output transfer function the accurate control to output transfer function for a buck peak current mode converter can be written as: equation 1 where r load represents the load resistance (see chapter 5.4 ), r cs the equivalent sensing resistor of the current sense circuitry, p the single pole introduced by the lc filter and z the zero given by the esr of the output capacitor. f h (s) accounts the sampling effect performed by the pwm comparator on the output of the error amplifier that introduces a double pole at one half of the switching frequency. v in - + - lc filter v ref error amplifier fb compensation network pwm comparator hs switch r s l c out r c c c + pwm control current sense ls switch v out v control g co (s) a o (s) led am1 3 490v1 g co s () r load r cs ----------------- - 1 1 r 0 t sw ? l ------------------------- - m c 1d ? () 0.5 ? ? [] ? + ------------------------------------------------------------------------------------------------ - 1 s z ---- - + ?? ?? 1 s p ----- + ?? ?? -------------------- - f h s () ??? =
application notes - buck conversion LED5000 14/51 doc id 023951 rev 1 equation 2 equation 3 where: equation 4 s n represents the slope of the sensed inductor current, s e the slope of the external ramp (v pp peak to peak amplitude) that implements the slope compensation to avoid sub- harmonic oscillations at duty cycle over 50% the sampling effect contribution f h (s) is: equation 5 where: equation 6 and equation 7 5.3 error amplifier compensation network the external compensation network connected at the output of the error amplifier is dimensioned to stabilize the system depending on the application conditions. z 1 esr c out ? ---------------------------------- = p 1 r load c out ? ---------------------------------------- m c 1d ? () 0.5 ? ? lc out f sw ?? ------------------------------------------------ + = m c 1 s e s n ------ + = s e v pp f sw ? = s n v in v out ? l ----------------------------- - r cs ? = ? ? ? ? ? ? ? ? () 1 1 s n q p ? -------------------- - s 2 n 2 ----- ++ ------------------------------------------- = n f sw ? = q p 1 m c 1d ? () 0.5 ? ? [] ? --------------------------------------------------------------- - =
LED5000 application notes - buck conversion doc id 023951 rev 1 15/51 figure 7. transconductance embedded error amplifier r c and c c introduce a pole and a zero in the open loop gain. c p does not significantly affect system stability but it can be useful to reduce the noise at the output of the error amplifier. the transfer function of the error amplifier and its compensation network is: equation 8 where a vo = g m r o the poles of this transfer function are (if c c >> c 0 +c p ): equation 9 equation 10 whereas the zero is defined as: equation 11 am1 3 491v1 + - c p r c c c fb comp dv r 0 g m dv v + e/a r c c c c p c 0 a 0 s () a v0 1s + r c c c ?? () ? s 2 r 0 c 0 c p + () r c c c sr 0 c c ? r 0 c 0 c p + () r c c c ? + ? + () 1 + ? + ?? ?? ------------------------------------------------------------------------------------------------------------------------------- -------------------------------------------------------------------------------- = f p lf 1 2 r 0 c c ?? ? ----------------------------------------- - = f p hf 1 2 r c c 0 c p + () ?? ? ------------------------------------------------------------ = f z 1 2 r c c c ?? ? ----------------------------------------- - =
application notes - buck conversion LED5000 16/51 doc id 023951 rev 1 5.4 led small signal model once the system reaches the working condition the leds composing the row are biased and their equivalent circuit can be considered as a resistor for frequencies << 1 mhz. the led manufacturer typically provides the equivalent dynamic resistance of the led biased at different dc current. this parameter is required to study the behavior of the system in the small signal analysis. for instance, the equivalent dynamic resistance of luxeon iii star from lumiled measured with different biasing current levels is reported below: in case the led datasheet does not provide the equivalent resistor value, it can be easily derived as the tangent to the diode i-v characteristic in the present working point (see figure 8 ). figure 8 . equivalent series resistor figure 9 shows the equivalent circuit of the led constant current generator. the equivalent loading resistor in the leds working point is: equation 12 r led 1.3 i led 350ma = 0.9 i led 700ma = ? ? ? am1 3 492v1 1 0.1 1 2 3 [v] 4 [a] working point r load n led r led r sense + ? =
LED5000 application notes - buck conversion doc id 023951 rev 1 17/51 figure 9. load equivalent circuit as a consequence the led equivalent circuit gives the led (s) term correlating the output voltage with the high impedance fb input: equation 13 5.5 total loop gain in summary, the open loop gain can be expressed as: equation 14 5.6 compensation network design the maximum bandwidth of the system can be designed up to f sw /6 to guarantee a valid small signal model. equation 15 where p ( equation 3 ) is the pole introduced by the power components. the following calculations are valid in the hypothesis that bw > p which is the typical condition. vin vin rd1 rd1 cout cout l l rd2 rd2 rs rs dled1 dled1 rs rs d1 d1 d d cout cout vin vin l l dled2 dled2 am1 3 49 3 v1 led n led () r sense n led r led r sense + ? ------------------------------------------------------------ = gs () g co s () a 0 s () led n led () ?? = p 2 ? ------------- bw < bw max f sw 6 -------- - =
application notes - buck conversion LED5000 18/51 doc id 023951 rev 1 with the power components selected in accordance with chapter 5.9: component selection and given the bw specification, the components composing the compensation network can be calculated as: equation 16 where the term m c is represented in equation 4 , r load the equivalent loading resistor ( equation 12 ), r s the sensing resistor value, g m the error amplifier transconductance and r cs the current sense gain ( table 5: electrical characteristics ) equation 17 where k represents the leading position of the f z ( equation 11 ) with respect to the system bandwidth. in general, a value of 2 gives enough phase margin to the overall small loop transfer function. 5.7 example of system design design specification: v in =48 v, v fw_led =3.7 v, n led = 10, r led = 1.1 w , i led = 1 a, i led ripple = 2% the inductor and capacitor value are dimensioned to meet the i led ripple specification (see chapter 5.9.2 for output capacitor and inductor selection guidelines): l=22 h, c out =1.0 f mlcc (negligible esr) in accordance with chapter 5.9.1 the sensing resistor value is: equation 1 8 assuming a system bandwidth of: equation 19 the ideal values of the components making up the compensation network is: equation 20 final component selection is based on commercial values and a small capacitor c p is added to reduce noise at the error amplifier output. c p slightly decreases the bw and phase margin. r c 1 r load t sw ? l ----------------------------------- - m c 1d ? () 0.5 ? ? [] ? + f p ---------------------------------------------------------------------------------------------------------- - bw r cs ? g m r s ? --------------------------- - ? = c c k r c bw ? ------------------------ = r s 200 mv 1 a -------------------- 200 m == bw 70 khz bw max < = r c 43 k = c c 650 pf =
LED5000 application notes - buck conversion doc id 023951 rev 1 19/51 equation 21 the gain and phase margin bode diagrams are plotted, respectively, in figure 10 and figure 11 . figure 10. module plot figure 11. phase plot r c 47 k = c c 680 pf = c c 12 pf = am1 3 494v1 0.1 1 10 100 1 . 10 3 1 . 10 4 1 . 10 5 1 . 10 6 30 17 4 9 22 35 48 61 74 87 100 extern a l loop mod u le fre qu ency [hz] mod u le [db] 0.1 1 10 100 1 . 10 3 1 . 10 4 1 . 10 5 1 . 10 6 0 22.5 45 67.5 90 112.5 135 157.5 180 external loop gain phase am1 3 495v1
application notes - buck conversion LED5000 20/51 doc id 023951 rev 1 the cut-off frequency and the phase margin are: equation 22 5. 8 dimming operation the dimming input disables the switching activity, masking the pwm comparator output. the inductor current dynamic performance when dimming input goes high depends on the designed system response. the best dimming performance is obtained by maximizing the bandwidth and phase margin, when possible. as a general rule, the output capacitor minimization improves dimming performance. figure 12. dimming operation example in fact, when dimming enables the switching activity, a small capacitor value is fast charged with low inductor value. as a consequence, the leds current rising edge time is improved and the inductor current oscillation reduced. an oversized output capacitor value requires extra current for fast charge so generating an inductor current overshoot and oscillations. the switching activity is prevented as soon as the dimming signal goes low. nevertheless, the led current drops to zero only when the voltage stored in the output capacitor goes below a minimum voltage determined by the selected leds. as a consequence, a big capacitor value makes the led current falling time worse than a smaller one. the LED5000 embeds dedicated circuitry to improve led current rising edge time. f c 65 khz = pm 66 = am1 3 496v1
LED5000 application notes - buck conversion doc id 023951 rev 1 21/51 figure 13. led rising edge operation figure 14. led rising edge operation (zoom) am1 3 497v1 am1 3 49 8 v1
application notes - buck conversion LED5000 22/51 doc id 023951 rev 1 5. 8 .1 dimming frequency vs. dimming depth as seen in chapter 5.8 the leds current rising and falling edge time mainly depends on the system bandwidth (t rise ) and the selected output capacitor value (t rise and t fall ). the dimming performance depends on the minimum current pulse shape specification of the final application. the ideal minimum current pulse has rectangular shape, in any case it degenerates into a trapezoid or, at worst, into a triangle, depending on the ratio (t rise + t fall )/ t dim equation 23 the small signal response in figure 14 is considered as an example. equation 24 assuming the minimum current pulse (t min_pulse ) shape specification as: equation 25: where t dimming represents the dimming period and d min the minimum duty cycle which gives the t min_pulse charge. in the given example t min_pulse =9 s figure 15. dimming signal given t min_pulse it is possible to calculate the maximum dimming depth given the dimming frequency or vice versa. for example, assuming a 10 khz dimming frequency the maximum dimming depth is 9% or given a 5% dimming depth it follows a 5.5 khz maximum f dim . the LED5000 dimming performance is strictly dependent on the system small signal response. as a consequence, an optimized compensation network (good phase margin and bandwidth maximized) and minimized c out value are crucial for best performance. once rec gle tan t rise t fall + t dim -------------------------------------------- - 1 ? trapezoid t rise t fall + t dim -------------------------------------------- - 1 < triangle t rise t fall + t dim -------------------------------------------- - 1 = t rise 5 s ? t fall 2 s ? ? ? ? + 0.75 t min_pulse ? 0.75 d min t dimming ?? == am1 3 499v1
LED5000 application notes - buck conversion doc id 023951 rev 1 23/51 the external power components and the compensation network are selected, a direct measurement to determine t rise , t fall (see equation 24 ) is necessary to certify the achieved dimming performance. 5.9 component selection 5.9.1 s ensing resistor in closed loop operation the LED5000 feedback pin voltage is 200 mv, so the sensing resistor calculation is expressed as: equation 26 since the main loop (see chapter 5.1 ) regulates the sensing resistor voltage drop, the average current is regulated into the leds. the integration period is at minimum 5*t sw since the system bandwidth can be dimensioned up to f sw /5 at maximum. a system loop based on a peak current mode architecture features consistent advantages in comparison with simpler closed loop regulation schemes like the hysteretic or the constant on/off control. the system performs the output current regulation over a period which is at least five times longer than the switching frequency. the output current regulation neglects the ripple current contribution and its reliance on external parameters like input voltage and output voltage variations (line transient and led forward voltage spread). this performance can not be achieved with simpler regulation loops like hysteretic control. for the same reason, the switching frequency is constant over the application conditions, that helps to tune the emi filtering and to guarantee the maximum led current ripple specification in the application range. this performance cannot be achieved using constant on/off time architectures. 5.9.2 inductor and output capacitor selection the output capacitor filters the inductor current ripple that, given the application condition, depends on the inductor value. as a consequence the led current ripple, that is the main specification for a switching current source, depends on the inductor and output capacitor selection. figure 16. equivalent circuit r s 200 mv i led -------------------- - = dcr dcr dcr dcr cout cout rs rs vin vin l l esr esr rd1 rd1 vin vin l l esr esr dled1 dled1 1 2 d d cout cout 1 2 d d rs rs rdn rdn dledn dledn am1 3 500v1
application notes - buck conversion LED5000 24/51 doc id 023951 rev 1 the led ripple current can be calculated as the inductor ripple current ratio flowing into the output impedance using the laplace transform (see figure 11 ): equation 27 where the term 8/ 2 represents the main harmonic of the inductor current ripple (which has a triangular shape) and i l is the inductor current ripple. equation 2 8 so l value can be calculated as: equation 29 where t off is the off time of the embedded high switch, given by 1-d. as a consequence the lower is the inductor value (so higher the current ripple), the higher would be the c out value to meet the specification. a general rule to dimension l value is: equation 30 finally the required output capacitor value can be calculated equalizing the led current ripple specification with the module of the fourier transformer (see equation 27 ) calculated at f sw frequency. equation 31 example (see chapter 5.6 ): v in =48 v, i led =700 ma, iled /i led =2%, v fw_led =3.7 v, n led =10 a lower inductor value maximizes the inductor current slew rate for better dimming performance. equation 30 becomes: i ripple s () 8 2 ----- i l 1s esr c out ?? + () ?? 1s r s esr n led r led ? ++ () c out ?? + ------------------------------------------------------------------------------------------------------------------- = i l v out l -------------- t off ? n led v fw_led 200mv + ? l --------------------------------------------------------------------- t off ? == i l i led ----------- 0.5 ? () i ripple_spec =
LED5000 application notes - buck conversion doc id 023951 rev 1 25/51 equation 32 which is satisfied selecting a10 h inductor value. the output capacitor value has to be dimensioned according to equation 31 finally, given the selected inductor value, a 1 f ceramic capacitor value keeps the led current ripple ratio lower than the 2% of the nominal current. an output ceramic capacitor type (negligible esr) is suggested to minimize the ripple contribution given a fixed capacitor value. 5.9.3 input capacitor the input capacitor must be able to support the maximum input operating voltage and the maximum rms input current. since step-down converters draw current from the input in pulses, the input current is squared and the height of each pulse is equal to the output current. the input capacitor has to absorb all this switching current, whose rms value can be up to the load current divided by two (worst case, with duty cycle of 50%). for this reason, the quality of these capacitors has to be very high to minimize the power dissipation generated by the internal esr, thereby improving system reliability and efficiency. the critical parameter is usually the rms current rating, which must be higher than the rms current flowing through the capacitor. the maximum rms input current (flowing through the input capacitor) is: equation 33 where is the expected system efficiency, d is the duty cycle and i o is the output dc current. considering = 1 this function reaches its maximum value at d = 0.5 and the equivalent rms current is equal to i o divided by 2. the maximum and minimum duty cycles are: equation 34 and table 7. inductor selection manufacturer s eries inductor value ( h) s aturation current (a) wurth elektronik we-hci 7040 1 to 4.7 20 to 7 we-hci 7050 4.9 to 10 20 to 4.0 coilcraft xpl 7030 2.2 to 10 29 to 7.2 i l i led ----------- 0.5 = i rms i o d 2d 2 ? ----------------- ? d 2 2 ------ - + ? = d max v out v f + v inmin v sw ? ------------------------------------ - =
application notes - buck conversion LED5000 26/51 doc id 023951 rev 1 equation 35 where v f is the free wheeling diode forward voltage and v sw the voltage drop across the internal pdmos. considering the range d min to d max , it is possible to determine the max i rms going through the input capacitor. capacitors that can be considered are: electrolytic capacitors: these are widely used due to their low price and their availability in a wide range of rms current ratings. the only drawback is that, considering ripple current rating requirements, they are physically larger than other capacitors. ceramic capacitors: if available for the required value and voltage rating, these capacitors usually have a higher rms current rating for a given physical dimension (due to very low esr). the drawback is the considerably high cost. tantalum capacitors: small tantalum capacitors with very low esr are becoming more available. however, they can occasionally burn if subjected to very high current during charge. therefore, it is suggested to avoid this type of capacitor for the input filter of the device as they could be stressed by an high surge current when connected to the power supply. in case the selected capacitor is ceramic (so neglecting the esr contribution), the input voltage ripple can be calculated as: equation 36 5.10 layout considerations the layout of switching dc-dc converters is very important to minimize noise and interference. power-generating portions of the layout are the main cause of noise and so high switching current loop areas should be kept as small as possible and lead lengths as short as possible. high impedance paths (in particular the feedback connections) are susceptible to interference, so they should be as far as possible from the high current paths. a layout example is provided in figure 17 . table 8 . list of ceramic capacitors for the LED5000 manufacturer s eries capacitor value ( ) rated voltage (v) taiyo yuden umk325bj106mm-t 10 50 murata grm42-2 x7r 475k 50 4.7 50 d min v out v f + v inmax v sw ? -------------------------------------- = v in pp i o c in f sw ? -------------------------- 1 d --- - ? ?? ?? d ? d --- - 1d ? () ? + ? =
LED5000 application notes - buck conversion doc id 023951 rev 1 27/51 the input and output loops are minimized to avoid radiation and high frequency resonance problems. the feedback pin to the sensing resistor path must be designed as short as possible to avoid pick-up noise. another important issue is the ground plane of the board. since the package has an exposed pad, it is very important to connect it to an extended ground plane in order to reduce the thermal resistance junction-to-ambient and increase the noise immunity during the switching operation. in addition, to increase the design noise immunity, different signal and power grounds should be designed in the layout (see chapter 5.13: application circuit ). the signal ground serves the small signal components, the device analog ground pin, the exposed pad and a small filtering capacitor connected to the vcc pin. the power ground serves the device ground pin and the input filter. the different grounds are connected underneath the output capacitor. neglecting the current ripple contribution, the current flowing through this component is constant during the switching activity and so this is the cleanest ground point of the buck application circuit. figure 17. layout example 5.11 thermal considerations the dissipated power of the device is tied to three different sources: conduction losses due to the r dson , which are equal to: equation 37 where d is the duty cycle of the application. note that the duty cycle is theoretically given by the ratio between v out (n led ? v led + 200 mv) and v in , but in practice it is substantially am1 3 501v1 p on r rdson_hs i out () ? 2 d ? =
application notes - buck conversion LED5000 28/51 doc id 023951 rev 1 higher than this value to compensate for the losses in the overall application. for this reason, the conduction losses related to the r dson increase compared to an ideal case. switching losses due to turning on and off. these are derived using the following equation: equation 3 8 where t rise and t fall represent the switching times of the power element that cause the switching losses when driving an inductive load (see figure 18 ). t sw is the equivalent switching time. figure 1 8 . s witching losses quiescent current losses. equation 39 example (see chapter 5.6 ): v in =42 v, v fw_led =3.7 v, n led =8, i led =1500 ma the typical output voltage is: equation 40 r dson_hs has a typical value of 200 at 25 c. p sw v in i out t rise t fall + () 2 ---------------------------------------- - f sw v in = i out t sw_eq f sw ?? ? ?? ? = am1 3 502v1 p q v in i q ? = v out n led v fw_led v fb + ? 29.4v ==
LED5000 application notes - buck conversion doc id 023951 rev 1 29/51 for the calculation we can estimate r dson_hs = 300 m as a consequence of tj increase during the operation. t sw_eq is approximately 12 ns. i q has a typical value of 2.4 ma at v in = 48 v. the overall internal losses are: equation 41 equation 42 the junction temperature of device will be: equation 43 where t a is the ambient temperature and rth j-a is the thermal resistance junction-to- ambient. the junction-to-ambient (rth j-a ) thermal resistance of the device assembled in hso8 package and mounted on the evaluation is about 40 c/w. assuming the ambient temperature around 40 c, the estimated junction temperature is: 5.12 s hort-circuit protection in overcurrent protection mode, when the peak current reaches the current limit threshold, the device disables the power element and it is able to reduce the conduction time down to the minimum value (approximately 100 nsec typical) to keep the inductor current limited. this is the pulse-by-pulse current limitation to implement constant current protection feature. in overcurrent condition, the duty cycle is strongly reduced and, in most applications, this is enough to limit the switch current to the current threshold. the inductor current ripple during on and off phases can be written as: on phase equation 44 off phase p tot r dson_hs i out () ? 2 dv in i out f sw t sw ??? v in i q ? ++ ? = p tot 0.3 1.5 2 0.7 42 1.5 12 10 9 ? 850 10 3 42 2.4 10 3 ? ?? + ??? ? ? + ?? 1.2w ? = t j t a rth ja ? p tot ? + = t j 60 1.2w 40 c w ------- ? 110 c ? ? + = i l ton v in v out ? dcr l r dson hs + () i ? ? l -------------------------------------------------------------------------------------------------- t on () =
application notes - buck conversion LED5000 30/51 doc id 023951 rev 1 equation 45 where dcr l is the series resistance of the inductor and v fwdiode is the forward voltage drop across the external rectifying diode. the pulse-by-pulse current limitation is effective to implement constant current protection when: equation 46 from equation 44 and equation 45 we can gather that the implementation of the constant current protection becomes more critical the lower is the v out and the higher is v in . in fact, in short-circuit condition the voltage applied to the inductor during the off time becomes equal to the voltage drop across parasitic components (typically the dcr of the inductor and the forward voltage of the diode) since v out is negligible, while during t on the voltage applied the inductor is maximized and it is approximately equal to v in . in general the worst case scenario is heavy short-circuit at the output with maximum input voltage. the equation 44 and equation 45 in overcurrent conditions can be simplified to: equation 47 considering t on that has been already reduced to its minimum. equation 4 8 where t sw =1/f sw considering the nominal f sw . at high input voltage i l ton could be higher than i l toff and so the inductor current could escalate. as a consequence, the system typically meets the equation 46 at a current level higher than the nominal value thanks to the increased voltage drop across stray components. in most application conditions the pulse-by-pulse current limitation is effective to limit the inductor current. whenever the current escalates, a second level current protection called ?hiccup mode? is enabled. the hiccup protection offers an additional protection against heavy short-circuit condition at very high input voltage even considering the spread of the minimum conduction time of the power element. in case the hiccup current level (6.2 a typical) is triggered the switching activity is prevented for 16 msec typ. (see hiccup time in table 5: electrical characteristics ). figure 19 shows the operation of the constant current protection when a short-circuit is applied at the output at the maximum input voltage. i l ton v out dcr l iv fw diode + ? + () ? l ---------------------------------------------------------------------------------------- t off () = i l ton i l toff = i l ton v in dcr l r dson hs + () i ? ? l -------------------------------------------------------------------------- - t on min () v in l -------- - 90ns () ? = i l toff dcr l i ? v fw diode + () ? l ------------------------------------------------------------------- t sw 90ns ? () dcr l i ? v fw diode + () ? l ------------------------------------------------------------------- 1.18 s () ? =
LED5000 application notes - buck conversion doc id 023951 rev 1 31/51 figure 19. constant current protection triggering hiccup mode 5.13 application circuit figure 20. evaluation board application circuit the network d3, r4, rs implements an inexpensive overvoltage protection. r4 effect can be neglected during normal operation since the fb biasing current is negligible (tens of na, see table 5: electrical characteristics ) but it limits the current flowing in the zener diode d3. in case the load is disconnected or in case of open led: am1 3 50 3 v1 s m a ll s ign a l power pl a ne r s r56 tp6 gnd r1 10k r 3 24.9k c7 1 u f 50v tp1 dim c6 100nf tp4 vled+ jp1 d 3 bzx 38 4-c 3 9 c5 22pf tp 8 inh tp5 vled- c4 470pf tp 3 gnd jp2 c1 10 u f 50v tp2 vin u1 LED5000 s w 8 vin 7 boot 1 ep ep dim 2 inh 3 gnd 6 comp 4 fb 5 d1 s tp s3 l60u 2 1 c 3 100nf 50v c2 10 u f 50v r2 nm c 8 nm d2 bzx 38 4-4v7 r4 47k l1 47 u h am1 3 504v1
application notes - buck conversion LED5000 32/51 doc id 023951 rev 1 equation 49 r1 must be dimensioned to limit the d1 rated power so it is an inexpensive small signal zener diode. the overvoltage limits the output voltage in case of led disconnection so protecting leds when the string is reconnected with the device enabled. in case the ovp is not implemented, a large amount of non-controlled current could flow through the leds during the output capacitor discharging phase, thereby damaging the devices. table 9. component list reference part number description manufacturer c1,c2 c3225x7s1h106m 10 f 50 v (size 1210) tdk c3,c6 100 nf 50 v (size 0805) c4 470 pf 50 v (size 00603) c5 22 pf 50 v (size 0603) c7 c3216x7r1h105k 1 f 50 v (size 1206) tdk c8 not mounted d1 stps3l60u 3 a 60 v st d2 bzx384-c4v7 d3 bzx384-c39 l1 mss7341-473mld 47 h i sat =1.0 a (30% drop) i rms =1.85 a (40 c rise) (size 7.3 x 7.3 x 4.1 mm) coilcraft r s erj14bsfr27u 0.27 1% (size 1206) panasonic r1 10 k 1% (size 0603) r2 not mounted r3 24.9 k 1% (size 0603) r4 47 k 1% (size 0603) v out v fb v zener_diode + = i zener_diode v fb r s r 1 + -------------------- - =
LED5000 application notes - buck conversion doc id 023951 rev 1 33/51 figure 21. pcb layout (component side) figure 22. pcb layout (bottom side) am1 3 505v1 am1 3 506v1
application notes - alternative topologies LED5000 34/51 doc id 023951 rev 1 6 application notes - alternative topologies thanks to the wide input voltage range, the adjustable external compensation network and enhanced dimming capability, the LED5000 is suitable to implement boost and buck-boost topologies. 6.1 inverting buck-boost the buck-boost topology fits the application with an input voltage range that overlaps the output voltage, which is the voltage drop across the leds and the sensing resistor. the inverting buck-boost (see figure 23 ) requires the same component count as the buck conversion and it is more efficient than the positive buck-boost. a current generator based on this topology implies two main application constraints: the output voltage is negative so the leds must be reversed the device gnd floats with the negative output voltage. the device is supplied between v in and v out (<0). as a consequence: equation 50 so: equation 51 where v out <0. figure 23. inverting buck-boost example 1 v in range =12-24 v, v fw_led =3.7 v, n led = 5 so v out =18.7 v v in_max LED5000 v in v out ? = v in v in_max LED5000 v out + 48 v out + == v in v ref i sw am1 3 507v1
LED5000 application notes - alternative topologies doc id 023951 rev 1 35/51 since the maximum operating voltage of the LED5000 is 48 v, according to equation 51 the maximum input voltage of the application is 48-18.7=29.3 v the output voltage is given by: equation 52 where the ideal duty cycle d ideal for the buck-boost converter is: equation 53 however, due to power losses (mainly switching and conduction losses), the real duty cycle is always higher than this. the real value (which can be measured in the application) should be used in the following formulas. the peak current flowing in the embedded switch is: equation 54 while its average current level is equal to: equation 55 this is due to the fact that the current flowing through the internal power switch is delivered to the output only during the off phase. the switch peak current must be lower than the minimum current limit of the overcurrent protection (see section table 5.: electrical characteristics for details) while the average current must be lower than the rated dc current of the device. as a consequence, the maximum output current is: equation 56 where i sw max represents the rated current of the device. the current capability is reduced by the term (1-d real ) and so, for example, with a duty cycle of 0.5, and considering an average current through the switch of 3 a, the maximum output current deliverable to the load is 1.5 a. the figure 24 shows the schematic circuit for an led current source based on inverting buck-boost topology. the input voltage ranges from 10 to 26 v and it can drive a string composed of 10 leds with1 a dc. v out v in ? d ideal 1d ideal ? ---------------------------- ? = d ideal v ? out v in v out ? ----------------------------- - = i sw i load 1d real ? -------------------------- - i ripple 2 ------------------- - + i load 1d real ? -------------------------- - v in 2l ? ------------- d f sw --------- ? + == i sw i load 1d real ? -------------------------- - = i load max i sw max 1d real ? () ? ?
application notes - alternative topologies LED5000 36/51 doc id 023951 rev 1 figure 24. led current source based on inverting bb topology the circuitry q1, r2, r3, r4 implements a level shifter to convert the dimming signal voltage levels (referred to gnd) to the device rails, since the LED5000 local ground is referred to the negative output voltage (given by the voltage drop across the leds and the sensing resistor). figure 25 shows the dimming operation: the light blue trace represents the dim pin, the yellow the sw (high level is v in , low level is -v out ), the green trace the inductor current (see figure 54 ) and the purple is the output voltage. figure 25. inverting bb dimming operation the network d1, r1, rs implements an inexpensive overvoltage protection. r1 effect can be neglected during normal operation since the fb biasing current is negligible (tens of na, see table 5: electrical characteristics ) but it limits the current flowing in the zener diode d1. in case the load is disconnected or in case of open led: s m a ll s ign a l jumper -vo u t c5 1 u f 50v c7 15pf tp 3 dim tp5 vled+ l1 xal6060-15 u h r1 100k d2 s tp s3 l60u c9 nm c4 100nf 50v r s 1 0.2 c 8 4.7 u f c 3 10 u f 50v r 3 10k r2 100k tp4 gnd t1 1 3 2 d1 bzx 38 4-c 3 9 r5 10k q1 bc 8 07-16 u1 LED5000 s w 8 vin 7 boot 1 ep ep dim 2 inh 3 gnd 6 comp 4 fb 5 tp1 vin c2 10 u f 50v tp2 vled- c6 1.5nf r4 47k c1 100nf am1 3 50 8 v1 am1 3 509v1
LED5000 application notes - alternative topologies doc id 023951 rev 1 37/51 equation 57 r1 must be dimensioned to limit the d1 rated power so it is an inexpensive small signal zener diode. the overvoltage protection plays an important role for the inverting buck-boost topology. in fact, in case of open row, the output voltage tends to diverge thus exceeding the input voltage absolute maximum rate and the device would be damaged (see equation 50 ). the overvoltage protection limits v out and thereby it protects the device in case of load disconnection. to design the compensation network for the inverting buck-boost topology please refer to paragraph chapter 6.4: compensation network design for alternative topologies . figure 26. inverting bb pcb layout (component side) figure 27. inverting bb pcb layout (bottom side) v out v fb v zener_diode + = i zener_diode v fb r s r 1 + -------------------- - = am1 3 510v1 am1 3 511v1
application notes - alternative topologies LED5000 38/51 doc id 023951 rev 1 6.2 positive buck-boost positive buck-boost fits those applications that require a buck-boost topology (i.e. the input voltage range crosses the output voltage value) and where the inverting buck-boost is not suitable because of the main constraints for the final application (refer to chapter 6.1 ). as a consequence the inverting buck-boost is the preferred option because it requires less components and it has higher efficiency compared to the positive buck-boost topology. figure 2 8 . positive buck-boost the positive buck-boost implementation ( figure 28 ) requires one more diode and an external power switch than inverting buck-boost. the device is not floating, referred to gnd, and it is supplied with the input voltage of the application (the input voltage in inverting buck- boost topology is instead v in -v out , refer to chapter 6.1 for details). LED5000 does not see the output voltage during the switching activity so v out can be higher than the maximum input voltage. the equations for the positive buck-boost are similar to those seen for the inverting. equation 5 8 where the ideal duty cycle d ideal for the buck-boost converter is: equation 59 however, due to power losses (mainly switching and conduction losses), the real duty cycle is always higher than this. the real value (which can be measured in the application) should be used in the following formulas. the peak current flowing in the embedded switch is: equation 60 while its average current level is equal to: v in v ref i sw am1 3 512v1 v out v in d ideal 1d ideal ? ---------------------------- ? = d ideal v out v in v out + ----------------------------- - = i sw i load 1d real ? -------------------------- - i ripple 2 ------------------- - + i load 1d real ? -------------------------- - v in 2l ? ------------- d f sw --------- ? + ==
LED5000 application notes - alternative topologies doc id 023951 rev 1 39/51 equation 61 this is due to the fact that the current flowing through the internal power switch is delivered to the output only during the off phase. the switch peak current must be lower than the minimum current limit of the overcurrent protection (see section table 5.: electrical characteristics for details) while the average current must be lower than the rated dc current of the device. as a consequence, the maximum output current is: equation 62 where i sw max represents the rated current of the device. the current capability is reduced by the term (1-d real ) and so, for example, with a duty cycle of 0.5, and considering an average current through the switch of 3 a, the maximum output current deliverable to the load is 1.5 a. figure 29 shows the circuit schematic for an led current source based on positive buck- boost topology. the input voltage ranges from 18 to 30 v and it can drive a string composed of 7 leds with 0.7 a dc (v fw_led = 3.75 v so v out =26.4 v). the network d5, r4, r s implements an inexpensive overvoltage protection. r4 effect can be neglected during the normal operation since the fb biasing current is negligible (tens of na, see table 5: electrical characteristics ) but it limits the current flowing in the zener diode d5. in case the load is disconnected or in case of open led: equation 63 r4 must be dimensioned to limit the d5 rated power so it is an inexpensive small signal zener diode. figure 29. led current source based on positive bb+ topology i sw i load 1d real ? -------------------------- - = i load max i sw max 1d real ? () ? ? v out v fb v zener_diode + = i zener_diode v fb r s r 4 + -------------------- - = s m a ll s ign a l power pl a ne l1 xal6060-22 u h d 3s tp s3 l60u 2 1 d5 bzx 38 4-c 3 0 r4 10k r 3 10k r1 10k c9 1nf tp1 dim r s 0.2 8 r c6 100nf r5 nm jp1 c10 nm c7 nm tp4 inh c5 15pf c4 1.5nf tp5 vled- tp6 gnd c1 10 u f c 8 2.2 u f 50v d4 bzx 38 4-c16 jp2 tp 3 vled+ r6 100 tp2 vin r 8 10k r7 nm d6 nm q1 s tn 3 nf06l d1 s tp s3 l60u 2 1 u1 LED5000 s w 8 vin 7 boot 1 ep ep dim 2 inh 3 gnd 6 comp 4 fb 5 tp7 gnd d2 bzx 8 4-4v7 r2 nm c2 10 u f c 3 100nf am1 3 51 3 v1
application notes - alternative topologies LED5000 40/51 doc id 023951 rev 1 in case of open row, the positive output voltage tends to diverge, exceeding the d3 maximum reverse voltage and so the diode would be damaged. the overvoltage protection limits v out and it protects the power components in case of load disconnection. the network d4, r8 implements a level shifter to drive the gate of the transistor q1. the voltage at q1 is: equation 64 considering the v in range 18 to 30 v: equation 65 the gate is driven inside the component specification. r8 can be dimensioned to discharge the gate when v sw is low. in case the input voltage range of the application is not suitable to implement a level shifter to drive q1, a dissipative clamping network (like r5, d6) must be used. to design the compensation network for the positive buck-boost topology please refer to paragraph chapter 6.4: compensation network design for alternative topologies . 6.3 floating boost the floating boost topology (see figure 30 ) serves those applications with an input voltage range narrower than the output voltage, that is the voltage drop across the leds and the sensing resistor (i.e. v in < v out ). the topology is called floating since the output voltage is referred to v in and not gnd, but this is typically suitable for a floating load like a string of leds. figure 30. floating boost the device is supplied by the output voltage so the maximum voltage drop across the leds string is 48 v. the direct path of the boost conversion (c out , v diode , l) guarantees the proper startup when the input voltage is: v q1 gate v sw v dz4 ? v sw 15v ? == v q1 gate min v sw v dz4 ? 18v 15v ? 3v === v q1 gate max v sw v dz4 ? 30v 16v ? 15v === v ref v cc lx gnd v in am1 3 514v1
LED5000 application notes - alternative topologies doc id 023951 rev 1 41/51 equation 66 where v op_min is the minimum operating voltage. the equations for the floating boost are: equation 67 the ideal duty cycle d ideal for the boost converter is: equation 6 8 as seen for the buck-boost topologies ( chapter 6.1 and chapter 6.2 ), due to power losses the real duty cycle is always higher than the ideal. the real value (that can be measured in the application) should be used in the following formulas to estimate the switch current. the peak current flowing in the embedded switch is: equation 69 while its average current level is equal to: equation 70 this is due to the fact that the current flowing through the internal power switch is delivered to the output only during the off phase. the switch peak current must be lower than the minimum current limit of the overcurrent protection (see section table 5.: electrical characteristics for details) while the average current must be lower than the rated dc current of the device. as a consequence, the maximum output current depends on the application conditions: equation 71 where i sw max represents the rated current of the device. the current capability is reduced by the term (1-d real ) and so, for example, with a duty cycle of 0.5, and considering an average current through the switch of 3 a, the maximum output current deliverable to the load is 1.5 a. v in_start v op_min v diode + 5.5v v diode + == v out v in 1d ideal ? ---------------------------- = d ideal v out v in ? v out ----------------------------- = i sw i load 1d real ? -------------------------- - i ripple 2 ------------------- - + i load 1d real ? -------------------------- - v in 2l ? ------------- d f sw --------- ? + == i sw i load 1d real ? -------------------------- - = i load max i sw max 1d real ? () ? ?
application notes - alternative topologies LED5000 42/51 doc id 023951 rev 1 figure 31 shows the circuit schematic for an led current source based on the floating boost topology. the input voltage ranges from 12 to 36 v and it can drive a string composed of 11 leds with 0.7 a dc (v fw_led = 3.74 v so v out =41 v). figure 31. led current source based on floating boost topology the network d1, r1, r s implements an inexpensive overvoltage protection. r1 effect can be neglected during the normal operation since the fb biasing current is negligible (tens of na, see table 5: electrical characteristics ) but it limits the current flowing in the zener diode d1. in case the load is disconnected or in case of open led: equation 72 r1 must be dimensioned to limit the d1 rated power so it is an inexpensive small signal zener diode. the circuitry q1, r3, r4, r5 implements a level shifter to convert the dimming signal voltage levels (referred to gnd) to the device rails, since the LED5000 local ground is floating. the LED5000 local gnd level is: equation 73 where vlgnd represent the local gnd value. figure 25 shows the dimming operation: the light blue trace represents the dim pin, the yellow the sw (high level is v in , low level is v in -v out ), the green trace the inductor current (see figure 69 ) and the purple is the output voltage. s mb flat r 3 100k t1 1 3 2 d1 bzx 38 4-c47 c1 100nf r s 1 0.2 8 r tp2 vled+ tp1 vin tp 3 vled- tp4 dim q1 bc 8 07-16 r5 47k c4 2.2nf l1 33u h r4 10k c 3 2.2 u f 50v d2 s tp s3 l60u c5 100nf c6 nm tp5 gnd r2 10k u1 LED5000 s w 8 vin 7 boot 1 ep ep dim 2 inh 3 gnd 6 comp 4 fb 5 c2 15pf r1 10k am1 3 515v1 v out v fb v zener_diode + = i zener_diode v fb r s r 1 + -------------------- - = v lgnd v in v out ? =
LED5000 application notes - alternative topologies doc id 023951 rev 1 43/51 figure 32. floating bb dimming operation to design the compensation network for the boost topology please refer to paragraph chapter 6.4: compensation network design for alternative topologies . figure 33. floating boost pcb layout (component side) figure 34. floating boost pcb layout (bottom side) am1 3 516v1 am1 3 517v1 am1 3 51 8 v1
application notes - alternative topologies LED5000 44/51 doc id 023951 rev 1 6.4 compensation network design for alternative topologies the small signal analysis for the alternative topologies can be written as: equation 74 that shares similar terms with equation 1 which is valid for the buck (see equation 1 ). in addition k dx depends on the topology (different for boost and buck-boost) and z_rhp ( equation 75 ) is a zero in the right half plane: equation 75 the rhp (right half plane) zero has the same 20 db/dec rising gain magnitude as a conventional zero, but with 90 degree phase drop instead of lead. this characteristic cannot be compensated with the error amplifier network so the loop gain is designed to roll off at lower frequency in order to keep its contribution outside the small signal analysis. z_rhp (see equation 75 ) depends on the equivalent output resistance, inductor value and the duty cycle. as a consequence the minimum z_rhp over the input voltage range determines the maximum system bandwidth: equation 76 the system phase margin depends on k. this paragraph provides the equations to calculate the components of the compensation network once selected the power components and given the bw specification. table 10: bb and boost parameters summarizes the k d , k m , k parameters useful for the next calculations of the compensation network. the dc gain of the total small loop is: equation 77 where g m is the error amplifier transconductance, r ea the equivalent output resistance of the error amplifier, r cs the internal current sense gain (for these parameters refer to table 5: electrical characteristics ), r s the sensing resistor value, and k d can be calculated from ta b l e 1 0 the calculation of the components composing the compensation network depends on the relative position of the pole f p (see equation 3 ) and the designed bandwidth bw. g co s () r load r cs ----------------- - 1d ? () k dx ------------------ 1 s z_rhp ----------------- - ? ?? ?? 1 s z ----- + ?? ?? ? 1 s p ----- + ?? ?? ------------------------------------------------------------- f h s () ?? ? = z_rhp r out 1d ? () 2 ? l ------------------------------------------- = bw bw max 1 k --- - z_rhp_min 2 ? ----------------------------- ? f sw 6 -------- - ? = a 0 g m r ea 1d ? () r s r cs ---------- - 1 k d ------- ?? ?? =
LED5000 application notes - alternative topologies doc id 023951 rev 1 45/51 equation 7 8 6.4.1 f p < bw in case the pole f p is inside the system bandwidth bw, the component values composing the compensation network can be calculated as: equation 79 and table 10. bb and boost parameters boost buck-boost k d k m k f p p 2 ? ------------- 1 2 ? ------------- k d c o r load ? --------------------------------- ? == 1 r load v out i led ----------------- --------------------- - r load 1d ? () 2 ? r cs --------------------------------------------------- 1 k m -------- - k 1d ? () ------------------ + ?? ?? ?? ? ++ 1 r load d ? v out i led ----------------- ------------------------------------ - r load 1d ? () 2 ? r cs --------------------------------------------------- 1 k m -------- - k 1d ? () ------------------ + ?? ?? ?? ? ++ 1 0.5 d ? () r cs t sw l ------------- v out v in ? v out --------------------------------- - r cs t sw l ------------- ?? + ?? ------------------------------------------------------------------------------------------------------------------------------- ------------------- 1 0.5 d ? () r cs t sw l ------------- v out v in v + out ----------------------------------- - r cs t sw l ------------- ?? + ?? ------------------------------------------------------------------------------------------------------------------------------- --------------------- - 0.5 r cs t sw l ------------- d1d ? () ?? ?? . ------------- d1d ? () ?? ?? ---------- bw f p --------- ? =
application notes - alternative topologies LED5000 46/51 doc id 023951 rev 1 equation 8 0 where k represents the leading position of the f z ( equation 11 ) in respect to the system bandwidth. in general a decade (k=10) gives enough phase margin to the overall small loop transfer function. 6.4.2 f p > bw in case the pole f p is outside the system bandwidth bw, the component values composing the compensation network can be calculated as: equation 8 1 and equation 8 2 where k represents the leading position of the f z ( equation 11 ) in respect to the pole f p . c c k 2 r ?? c bw ? --------------------------------------------- = r c r ea a 0 ---------- bw f p --------- ? = c c k 2 r ?? c f p ? ---------------------------------------- =
LED5000 package mechanical data doc id 023951 rev 1 47/51 7 package mechanical data in order to meet environmental requirements, st offers these devices in different grades of ecopack ? packages, depending on their level of environmental compliance. ecopack ? specifications, grade definitions and product status are available at: www.st.com . ecopack ? is an st trademark. table 11. h s op 8 mechanical data dim. mm min. typ. max. a 1.75 a1 0.15 a2 1.25 b 0.38 0.51 c 0.17 0.25 d 4.80 4.90 5.00 d1 3.10 3.30 3.50 e 5.80 6.00 6.20 e1 3.80 3.90 4.00 e2 2.20 2.40 2.60 e1.27 h 0.30 0.50 l 0.45 0.80 k0 8
package mechanical data LED5000 48/51 doc id 023951 rev 1 figure 35. package dimensions 7195016_d
LED5000 ordering information doc id 023951 rev 1 49/51 8 ordering information table 12. order code order code package packing LED5000phr hpso8 tube
revision history LED5000 50/51 doc id 023951 rev 1 9 revision history table 13. document revision history date revision changes 31-jan-2013 1 initial release.
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